- 24 Jan, 2017 1 commit
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Fabio Estevam authored
Commit 7f107887 ("ARM: dts: imx: Remove skeleton.dtsi") causes boot issues when the bootloader does not create a 'chosen' node if such node is not present in the dtb. The reason for the boot failure is well explained by Javier Martinez Canillas: "the decompressor relies on a pre-existing chosen node to be available to insert the command line and merge other ATAGS info." , so pass an empty 'chosen' node to fix the boot problem. This issue has been seen in the kernelci reports with Barebox as bootloader. Also pass the 'memory' node in order to fix boot issues on the SolidRun iMX6 platforms. Fixes: 7f107887 ("ARM: dts: imx: Remove skeleton.dtsi") Reported-by:
kernelci.org bot <bot@kernelci.org> Reported-by:
Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by:
Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 14 Nov, 2016 1 commit
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Fabio Estevam authored
As explained by commit 9c0da3cc ("ARM: dts: explicitly mark skeleton.dtsi as deprecated"), including skeleton.dtsi is deprecated. This fixes the following warning with W=1: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name Signed-off-by:
Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 11 Jun, 2016 1 commit
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Stefan Wahren authored
This patch adds the missing reg properties for the MXS GPIO banks in order to fix the dtc warnings. Signed-off-by:
Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by:
Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 13 Apr, 2016 1 commit
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Uwe Kleine-König authored
Signed-off-by:
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 05 Mar, 2016 1 commit
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Sanchayan Maity authored
Change iio_hwmon nodes to use hypen in node names instead of underscore. Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com> Signed-off-by:
Guenter Roeck <linux@roeck-us.net>
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- 22 Dec, 2015 1 commit
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Mans Rullgard authored
Add auart4 2-pin configuration on auart0 rts/cts pads. Signed-off-by:
Mans Rullgard <mans@mansr.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 19 Oct, 2015 1 commit
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Stefan Wahren authored
This patch enables On Chip OTP support for i.MX23 and i.MX28 SoCs, but keeps the old compatible string. Signed-off-by:
Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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- 27 Apr, 2015 1 commit
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Marek Vasut authored
Fix a typo in the TX DMA interrupt name for AUART4. This patch makes AUART4 operational again. Signed-off-by:
Marek Vasut <marex@denx.de> Fixes: f30fb03d ("ARM: dts: add generic DMA device tree binding for mxs-dma") Cc: stable@vger.kernel.org Acked-by:
Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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- 30 Mar, 2015 2 commits
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Uwe Kleine-König authored
Signed-off-by:
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Matt Porter authored
The chipidea driver adds an extra line of spam to the log when a host-only chipidea instance is left set to the default of a dual role controller. [ 2.010873] ci_hdrc ci_hdrc.1: doesn't support gadget Set the dr_mode property to host on all the host-only nodes to avoid this warning. Signed-off-by:
Matt Porter <mporter@konsulko.com> Acked-by:
Peter Chen <peter.chen@freescale.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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- 16 Sep, 2014 2 commits
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Uwe Kleine-König authored
Signed-off-by:
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by:
Shawn Guo <shawn.guo@freescale.com>
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Marc Kleine-Budde authored
Signed-off-by:
Marc Kleine-Budde <mkl@pengutronix.de> [ukl: rebase from ancient kernel version] Signed-off-by:
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by:
Shawn Guo <shawn.guo@freescale.com>
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- 16 May, 2014 1 commit
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Michael Heimpold authored
Signed-off-by:
Michael Heimpold <mhei@heimpold.de> Acked-by:
Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by:
Shawn Guo <shawn.guo@freescale.com>
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- 09 Feb, 2014 7 commits
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Peter Chen authored
We need to use controller id to access different register regions for mxs phy. Signed-off-by:
Peter Chen <peter.chen@freescale.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Alexandre Belloni authored
This allows to read the SoC on-die temperature sensor available on the LRADC by using: cat /sys/class/hwmon/hwmon0/device/temp1_input Signed-off-by:
Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Alexandre Belloni authored
Adding #io-channel-cells property to lradc allows us to use the lradc as an iio provider. Signed-off-by:
Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Michael Grzeschik authored
The pins have nothing todo with the phy layer. We better rename them, so it gets clear they are routed to the ehci core not to any phy. Signed-off-by:
Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Denis Carikli authored
Cc: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: Eric Bénard <eric@eukrea.com> Signed-off-by:
Denis Carikli <denis@eukrea.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Denis Carikli authored
Cc: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: Eric Bénard <eric@eukrea.com> Signed-off-by:
Denis Carikli <denis@eukrea.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Aida Mynzhasova authored
Add auart2 pins configuration on its main pads Signed-off-by:
Aida Mynzhasova <aida.mynzhasova@skitlab.ru> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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- 05 Jan, 2014 1 commit
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Marek Vasut authored
Enable the DCP by default on both i.MX23 and i.MX28. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: David S. Miller <davem@davemloft.net> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: devicetree@vger.kernel.org Signed-off-by:
Herbert Xu <herbert@gondor.apana.org.au>
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- 01 Oct, 2013 1 commit
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Juergen Beisert authored
The delay units inside the LRADC depend on the presence of a 2 kHz clock. This change enables the clock to be able to use the delay unit for the touchscreen part of the driver. Signed-off-by:
Juergen Beisert <jbe@pengutronix.de> Tested-by:
Marek Vasut <marex@denx.de> Acked-by:
Marek Vasut <marex@denx.de> Tested-by:
Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by:
Jonathan Cameron <jic23@kernel.org>
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- 27 Sep, 2013 1 commit
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Marek Vasut authored
Add pinmux for 4-bit SD card connected to SSP2. Signed-off-by:
Marek Vasut <marex@denx.de> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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- 26 Sep, 2013 4 commits
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Lothar Waßmann authored
This pin definition had been added after the initial patch to use symbolic pin names in DTS files. Signed-off-by:
Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Lothar Waßmann authored
Convert mx23/mx28 dts files to use the padconfig defintions from mxs-pinfunc.h. Signed-off-by:
Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Lothar Waßmann authored
Convert mx23/mx28 dts filed to use the pinctrl header files. NOTE: During automatic conversion of these files to use the pinconfig definitions an inconsistency has been found in: arch/arm/boot/dts/imx28-apx4devkit.dts According to the comment the function for pad SSP2_SS0 should have been MX28_PAD_SSP2_SS0__GPIO_2_19, while the given value 0x2131 represents: MX28_PAD_SSP2_SS0__AUART3_TX I used the later (though probably wrong) definition because that's what is actually being used in the DTB. Signed-off-by:
Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Fabio Estevam authored
Testing g_ether results in the following: [ 1.648022] using random self ethernet address [ 1.652778] using random host ethernet address [ 1.660504] usb0: HOST MAC c6:28:6a:81:dc:ff [ 1.666360] usb0: MAC 7e:81:54:16:c0:c6 [ 1.670504] using random self ethernet address [ 1.675842] using random host ethernet address [ 1.682655] g_ether gadget: Ethernet Gadget, version: Memorial Day 2008 [ 1.689332] g_ether gadget: g_ether ready [ 3.328974] irq 237: nobody cared (try booting with the "irqpoll" option) [ 3.335831] CPU: 0 PID: 1 Comm: swapper Not tainted 3.11.0-rc6-next-20130819 #1035 [ 3.343500] [<c0014258>] (unwind_backtrace+0x0/0xf0) from [<c0011b20>] (show_stack+0x10/0x14) [ 3.352098] [<c0011b20>] (show_stack+0x10/0x14) from [<c006af4c>] (__report_bad_irq+0x20/0xc0) [ 3.360763] [<c006af4c>] (__report_bad_irq+0x20/0xc0) from [<c006b3f4>] (note_interrupt+0x1d4/0x234) [ 3.369943] [<c006b3f4>] (note_interrupt+0x1d4/0x234) from [<c0069754>] (handle_irq_event_percpu+0xc4/0x268) [ 3.379815] [<c0069754>] (handle_irq_event_percpu+0xc4/0x268) from [<c0069934>] (handle_irq_event+0x3c/0x5c) [ 3.389686] [<c0069934>] (handle_irq_event+0x3c/0x5c) from [<c006bb78>] (handle_level_irq+0x8c/0xe8) [ 3.398865] [<c006bb78>] (handle_level_irq+0x8c/0xe8) from [<c0068ff0>] (generic_handle_irq+0x20/0x30) [ 3.408213] [<c0068ff0>] (generic_handle_irq+0x20/0x30) from [<c000fc9c>] (handle_IRQ+0x30/0x84) [ 3.417040] [<c000fc9c>] (handle_IRQ+0x30/0x84) from [<c0012564>] (__irq_svc+0x44/0x54) [ 3.425094] [<c0012564>] (__irq_svc+0x44/0x54) from [<c0020244>] (__do_softirq+0x90/0x268) [ 3.433400] [<c0020244>] (__do_softirq+0x90/0x268) from [<c00207d4>] (irq_exit+0x9c/0xd8) [ 3.441619] [<c00207d4>] (irq_exit+0x9c/0xd8) from [<c000fca0>] (handle_IRQ+0x34/0x84) [ 3.449577] [<c000fca0>] (handle_IRQ+0x34/0x84) from [<c0012564>] (__irq_svc+0x44/0x54) [ 3.457629] [<c0012564>] (__irq_svc+0x44/0x54) from [<c04602b0>] (_raw_spin_unlock_irqrestore+0x34/0x44) [ 3.467164] [<c04602b0>] (_raw_spin_unlock_irqrestore+0x34/0x44) from [<c0348298>] (input_register_handler+0x98/0xb4) [ 3.477835] [<c0348298>] (input_register_handler+0x98/0xb4) from [<c064bc10>] (mousedev_init+0x30/0x60) [ 3.487275] [<c064bc10>] (mousedev_init+0x30/0x60) from [<c00088ac>] (do_one_initcall+0xe8/0x154) [ 3.496198] [<c00088ac>] (do_one_initcall+0xe8/0x154) from [<c062aabc>] (kernel_init_freeable+0xf0/0x1b4) [ 3.505810] [<c062aabc>] (kernel_init_freeable+0xf0/0x1b4) from [<c0456550>] (kernel_init+0x8/0xe4) [ 3.514899] [<c0456550>] (kernel_init+0x8/0xe4) from [<c000ee60>] (ret_from_fork+0x14/0x34) [ 3.523263] handlers: [ 3.525578] [<c0339d14>] ci_irq [ 3.528757] Disabling IRQ #237 Provide the USB0_ID pin in the usb0 node, so that g_ether can operate correctly. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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- 16 Aug, 2013 7 commits
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Lothar Waßmann authored
Signed-off-by:
Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Lothar Waßmann authored
Signed-off-by:
Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Lothar Waßmann authored
Signed-off-by:
Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Lothar Waßmann authored
Signed-off-by:
Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Lothar Waßmann authored
Signed-off-by:
Lothar Waßmann <LW@KARO-electronics.de> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Fabio Estevam authored
After providing spi alias, we can get the following message during probe: m25p80 spi1.0: sst25vf016b (2048 Kbytes) ,which looks better than the original one: m25p80 spi32766.0: sst25vf016b (2048 Kbytes) While at it, keep the alias entries in alphabetical order. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Shawn Guo authored
After mxs-dma driver adopts generic DMA device tree binding, channel interrupt number is defined in DMA controller node, and channel ID is listed in "dmas" property. So the DMA channel interrupt number in client nodes' "interrupts" property and fsl,<module>-dma-channel which are used by old customized DMA binding can be removed now. Signed-off-by:
Shawn Guo <shawn.guo@linaro.org> Reviewed-by:
Arnd Bergmann <arnd@arndb.de>
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- 15 Jul, 2013 1 commit
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Shawn Guo authored
These systems all use saif0 as the mclock provider to codec sgtl5000. Reflect that in device tree source, so that sgtl5000 can find the clock by calling clk_get(). Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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- 17 Jun, 2013 4 commits
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Eric Bénard authored
Add auart4 2 pins configuration on SSP3 pads Signed-off-by:
Eric Bénard <eric@eukrea.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Eric Bénard authored
Add auart3 2 pins configuration on its main pads Signed-off-by:
Eric Bénard <eric@eukrea.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Eric Bénard authored
Add auart2 2 pins configuration on its main pads Signed-off-by:
Eric Bénard <eric@eukrea.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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Fabio Estevam authored
MX28 has the same DIGCTL block as MX23, so adjust the compatible string to reflect that. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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- 28 May, 2013 1 commit
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Tobias Rauter authored
This patch enables the DCP crypto functionality on imx28. Currently, only aes-128-cbc is supported. Moreover, the dcpboot misc-device, which is used by Freescale's SDK tools and uses a non-software-readable OTP-key, is added. Changes of v2: - ring buffer for hardware-descriptors - use of ablkcipher walk - OTP key encryption/decryption via misc-device (compatible to Freescale-SDK) - overall cleanup The DCP is also capable of sha1/sha256 but I won't be able to add that anytime soon. Tested with built-in runtime-self-test, tcrypt and openssl via cryptodev 1.6 on imx28-evk and a custom built imx28-board. Signed-off-by:
Tobias Rauter <tobias.rauter@gmail.com> Signed-off-by:
Herbert Xu <herbert@gondor.apana.org.au>
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