• Thomas Gleixner's avatar
    x86/apic: Mark _all_ legacy interrupts when IO/APIC is missing · 7d65f9e8
    Thomas Gleixner authored
    PIC interrupts do not support affinity setting and they can end up on
    any online CPU. Therefore, it's required to mark the associated vectors
    as system-wide reserved. Otherwise, the corresponding irq descriptors
    are copied to the secondary CPUs but the vectors are not marked as
    assigned or reserved. This works correctly for the IO/APIC case.
    
    When the IO/APIC is disabled via config, kernel command line or lack of
    enumeration then all legacy interrupts are routed through the PIC, but
    nothing marks them as system-wide reserved vectors.
    
    As a consequence, a subsequent allocation on a secondary CPU can result in
    allocating one of these vectors, which triggers the BUG() in
    apic_update_vector() because the interrupt descriptor slot is not empty.
    
    Imran tried to work around that by marking those interrupts as allocated
    when a CPU comes online. But that's wrong in case that the IO/APIC is
    available and one of the legacy interrupts, e.g. IRQ0, has been...
    7d65f9e8
apic.h 13.3 KB