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x86/cpu: Load microcode during restore_processor_state()
Borislav Petkov authored
When resuming from system sleep state, restore_processor_state()
restores the boot CPU MSRs. These MSRs could be emulated by microcode.
If microcode is not loaded yet, writing to emulated MSRs leads to
unchecked MSR access error:

  ...
  PM: Calling lapic_suspend+0x0/0x210
  unchecked MSR access error: WRMSR to 0x10f (tried to write 0x0...0) at rIP: ... (native_write_msr)
  Call Trace:
    <TASK>
    ? restore_processor_state
    x86_acpi_suspend_lowlevel
    acpi_suspend_enter
    suspend_devices_and_enter
    pm_suspend.cold
    state_store
    kobj_attr_store
    sysfs_kf_write
    kernfs_fop_write_iter
    new_sync_write
    vfs_write
    ksys_write
    __x64_sys_write
    do_syscall_64
    entry_SYSCALL_64_after_hwframe
   RIP: 0033:0x7fda13c260a7

To ensure microcode emulated MSRs are available for restoration, load
the microcode on the boot CPU before restoring these MSRs.

  [ Pawan: write commit message and productize it. ]

Fixes: e2a1256b

 ("x86/speculation: Restore speculation related MSRs during S3 resume")
Reported-by: default avatarKyle D. Pelton <kyle.d.pelton@intel.com>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Signed-off-by: default avatarPawan Gupta <pawan.kumar.gupta@linux.intel.com>
Tested-by: default avatarKyle D. Pelton <kyle.d.pelton@intel.com>
Cc: stable@vger.kernel.org
Link: https://bugzilla.kernel.org/show_bug.cgi?id=215841
Link: https://lore.kernel.org/r/4350dfbf785cd482d3fafa72b2b49c83102df3ce.1650386317.git.pawan.kumar.gupta@linux.intel.com
f9e14dbb
Name Last commit Last update
..
e820 x86/efi: EFI soft reservation to E820 enumeration
fpu Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
numachip x86/numachip: Introduce Numachip2 timer mechanisms
trace x86/fpu: Convert tracing to fpstate
uv x86: Fix various typos in comments
vdso clocksource/drivers/hyper-v: Re-enable VDSO_CLOCKMODE_HVCLOCK on X86
xen xen/x86: detect support for extended destination ID
GEN-for-each-reg.h x86/asm: Fix register order
Kbuild x86/syscalls: Switch to generic syscalltbl.sh
acenv.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
acpi.h x86/mce, cper: Pass x86 CPER through the MCA handling chain
acrn.h x86/acrn: Introduce hypercall interfaces
agp.h x86: Fix various typos in comments, take #2
alternative.h x86/alternative: Use .ibt_endbr_seal to seal indirect calls
amd-ibs.h perf/x86/amd/ibs: Add bitfield definitions in new <asm/amd-ibs.h> header
amd_hsmp.h platform/x86: Add AMD system management interface
amd_nb.h x86/amd_nb, EDAC/amd64: Move DF Indirect Read to AMD64 EDAC
apic.h x86/apic: Mark _all_ legacy interrupts when IO/APIC is missing
apicdef.h x86/apic: Cleanup delivery mode defines
apm.h x86/apm: Don't access __preempt_count with zeroed fs
arch_hweight.h x86/kconfig: Disable CONFIG_GENERIC_HWEIGHT and remove __HAVE_ARCH_SW_HWEIGHT
archrandom.h x86/cpu: Use RDRAND and RDSEED mnemonics in archrandom.h
asm-offsets.h kbuild: move asm-offsets.h to include/generated
asm-prototypes.h x86/retpoline: Move the retpoline thunk declarations to nospec-branch.h
asm.h x86/extable: Prefer local labels in .set directives
atomic.h
atomic64_32.h
atomic64_64.h
audit.h
barrier.h
bios_ebda.h
bitops.h
boot.h
bootparam_utils.h
bug.h
bugs.h
cache.h
cacheflush.h
cacheinfo.h
ce4100.h
checksum.h
checksum_32.h
checksum_64.h
clocksource.h
cmdline.h
cmpxchg.h
cmpxchg_32.h
cmpxchg_64.h
coco.h
compat.h
cpu.h
cpu_device_id.h
cpu_entry_area.h
cpufeature.h
cpufeatures.h
cpuidle_haltpoll.h
cpumask.h
crash.h
current.h
debugreg.h
delay.h
desc.h
desc_defs.h
device.h
disabled-features.h
div64.h
dma-mapping.h
dma.h
dmi.h
doublefault.h
dwarf2.h
edac.h
efi.h
elf.h
elfcore-compat.h
emergency-restart.h
emulate_prefix.h
enclu.h
entry-common.h
espfix.h
exec.h
extable.h
extable_fixup_types.h
fb.h
fixmap.h
floppy.h
frame.h
fsgsbase.h
ftrace.h
futex.h
gart.h
genapic.h
geode.h
hardirq.h
highmem.h
hpet.h
hugetlb.h
hw_breakpoint.h
hw_irq.h
hyperv-tlfs.h